The TLV320AIC3104-Q1 is a low-power stereo audio codec with stereo headphone amplifiers,
as well as multiple inputs and outputs that are programmable in single-ended or fully differential
configurations. Extensive register-based power control is included, enabling stereo 48-kHz DAC
playback as low as 14 mW from a 3.3-V analog supply, making it ideal for car audio applications in
cluster and head unit systems.
The record path of the TLV320AIC3104-Q1 contains integrated microphone bias, digitally
controlled stereo microphone preamplifier, and automatic gain control (AGC), with mix/mux
capability among the multiple analog inputs. Programmable filters are available during record which
can remove audible noise that can occur during noisy and unpredictable environments, such as when
an e-call system is activated. The playback path includes mix/mux capability from the stereo DAC
and selected inputs, through programmable volume controls, to the various outputs.
The TLV320AIC3104-Q1 contains four high-power output drivers as well as two fully
differential output drivers. The high-power output drivers are capable of driving a variety of load
configurations, including up to four channels of single-ended 16-Ω headphones using AC-coupling
capacitors, or stereo 16-Ω headphones in a capless output configuration. These parameters enable
the TLV320AIC3104-Q1 to act as an interface between the MCU and speaker amplifiers, such as the
TPA3111D1-Q1, in various audio applications in the
infotainment and cluster fields.
The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes
programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker
equalization, and de-emphasis for 32-kHz,
44.1-kHz, and 48-kHz sample rates. The stereo audio ADC supports sampling rates from 8 kHz to
96 kHz and is preceded by programmable gain amplifiers (PGA) or an automatic gain control (AGC)
circuit that can provide up to 59.5-dB analog gain for low-level microphone inputs. The
TLV320AIC3104-Q1 provides an extremely high range of programmability for both attack (8 ms to 1,408
ms) and for decay (0.05 s to 22.4 s). This extended AGC range allows the AGC to be tuned for many
types of applications.
Where neither analog nor digital signal processing are required, the device can be put in
a special analog signal passthrough mode. This mode significantly reduces power consumption, as
most of the device is powered down during this passthrough operation.
The serial control bus supports the I2C protocol, whereas the
serial audio data bus is programmable for I2S, left/right-justified,
DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support
for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz,
with special attention paid to the most-popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and
19.68-MHz system clocks.
The TLV320AIC3104-Q1 operates from an analog supply of 2.7 V to 3.6 V, a
digital core supply of 1.525 V to 1.95 V, and a digital I/O supply of 1.1 V to 3.6 V.
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