The ADC10065 is a monolithic CMOS analog-to-digital converter capable of converting
analog input signals into 10-bit digital words at 65 Megasamples per second (MSPS). This converter
uses a differential, pipeline architecture with digital error correction and an on-chip
sample-and-hold circuit to provide a complete conversion solution, and to minimize power
consumption, while providing excellent dynamic performance. A unique sample-and-hold stage yields a
full-power bandwidth of 400 MHz. Operating on a single 3.0V power supply, this device consumes just
68.4 mW at 65 MSPS, including the reference current. The Standby feature reduces power consumption
to just 14.1 mW.
The differential inputs provide a full scale selectable input swing of 2.0
VP-P, 1.5 VP-P, 1.0 VP-P, with
the possibility of a single-ended input. Full use of the differential input is recommended for
optimum performance. An internal +1.2V precision bandgap reference is used to set the ADC
full-scale range, and also allows the user to supply a buffered referenced voltage for those
applications requiring increased accuracy. The output data format is user choice of offset binary
or two’s complement.
This device is available in the 28-lead TSSOP package and will operate over the
industrial temperature range of −40°C to +85°C.
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