The ADC122S625 is a dual 12-bit, 50 kSPS to 200 kSPS simultaneous sampling
Analog-to-Digital (A/D) converter. The analog inputs on both channels are sampled simultaneously to
preserve their relative phase information to each other. The converter is based on a
successive-approximation register architecture where the differential nature of the analog inputs
is maintained from the internal track-and-hold circuits throughout the A/D converter to provide
excellent common-mode signal rejection. The ADC122S625 features an external reference that can be
varied from 1.0V to VA.
The ADC122S625's serial data output is binary 2's complement and is compatible with
several standards, such as SPI™, QSPI™, MICROWIRE™, and many common DSP serial interfaces. The
serial clock (SCLK) and chip select bar (CS) are shared by both channels.
Operating from a single 5V analog supply and a reference voltage of 2.5V, the total power
consumption while operating at 200 kSPS is typically 8.6 mW. With the ADC122S625 operating in
power-down mode, the power consumption reduces to 2.6 µW. The differential input, low power
consumption, and small size make the ADC122S625 ideal for direct connection to sensors in motor
Operation is specified over the industrial temperature range of −40°C to +105°C and clock
rates of 1.6 MHz to 6.4 MHz. The ADC122S625 is available in a 10-lead VSSOP package.
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