The ADS42JB69 and ADS42JB49 are high-linearity, dual-channel, 16- and 14-bit, 250-MSPS,
analog-to-digital converters (ADCs). These devices support the JESD204B serial interface with data
rates up to
3.125 Gbps. The buffered analog input provides uniform input impedance across a wide
frequency range while minimizing sample-and-hold glitch energy making it easy to drive analog
inputs up to very high input frequencies. A sampling clock divider allows more flexibility for
system clock architecture design.
The devices employ internal dither algorithms to provide excellent spurious-free
dynamic range (SFDR) over a large input frequency range.
For all available packages, see the orderable addendum at the
end of the datasheet.
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