The ADS42LB49 and ADS42LB69 are a family of
high-linearity, dual-channel, 14- and 16-bit,
250-MSPS, analog-to-digital converters (ADCs) supporting DDR and QDR LVDS output interfaces.
The buffered analog input provides uniform input impedance across a wide frequency range while
minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for
system clock architecture design. The ADS42LBx9 provides excellent spurious-free dynamic range
(SFDR) over a large input frequency range with low-power consumption.
For all available packages, see the orderable addendum at the
end of the datasheet.
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