See datasheet for actual packaging/pinout drawings

Packaging

Package | PIN:

RMP | 72

Temp:

I (-40 to 85)

ECO Plan:

Green (RoHS & no Sb/Br)

ADS58J64IRMPT


Quad-Channel, 14-Bit, 1-GSPS Telecom Receiver and Feedback IC

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Texas Instruments ADS58J64IRMPT

The ADS58J64 is a low-power, wide-bandwidth, 14-bit, 1-GSPS, quad-channel, telecom receiver device. The ADS58J64 supports a JESD204B serial interface with data rates up to 10 Gbps with one lane per channel. The buffered analog input provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy. The ADS58J64 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption. The digital signal processing block includes complex mixers followed by low-pass filters with decimate-by-2 and -4 options supporting up to a 200-MHz receive bandwidth. The ADS58J64 also supports a 14-bit, 500-MSPS output in burst mode, making the device suitable for a digital pre-distortion (DPD) observation receiver.

The JESD204B interface reduces the number of interface lines, thus allowing high system integration density. An internal phase-locked loop (PLL) multiplies the incoming analog-to-digital converter (ADC) sampling clock to derive the bit clock that is used to serialize the 14-bit data from each channel.

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