See datasheet for actual packaging/pinout drawings

Package | PIN:

N | 16

Temp:

M (-55 to 125)

ECO Plan:

Pb-Free (RoHS)

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CD4572UBE-CMOS Hex Gate (with 4 Inverters, One 2-Input NOR Gate, and One 2-Input NAND Gate)

CD4572UB Hex Gate provides the system designer with direct implementation of inverter, NAND, and NOR functions and supplements the existing family of CMOS gates.

The CD4572UB devices meet all requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices."

The CD4572UB types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

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