The CD74AC174 is a positive-edge-triggered D-type flip-flop with a direct clear (CLR)\ input and is designed for 1.5-V to 5.5-V VCC operation.
Information at the data (D) inputs that meets the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.
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