The HC173 and HCT173 high speed three-state quad Dtype
flip-flops are fabricated with silicon gate CMOS technology.
They possess the low power consumption of standard
CMOS Integrated circuits, and can operate at speeds comparable
to the equivalent low power Schottky devices. The
buffered outputs can drive 15 LSTTL loads. The large output
drive capability and three-state feature make these parts ideally
suited for interfacing with bus lines in bus oriented systems.
The four D-type flip-flops operate synchronously from a common
clock. The outputs are in the three-state mode when
either of the two output disable pins are at the logic "1" level.
The input ENABLES allow the flip-flops to remain in their
present states without having to disrupt the clock If either of
the 2 input ENABLES are taken to a logic "1" level, the Q
outputs are fed back to the inputs, forcing the flip-flops to
remain in the same state. Reset is enabled by taking the
MASTER RESET (MR) input to a logic "1" level. The data
outputs change state on the positive going edge of the clock.
The HCT173 logic family is functionally, as well as pin compatible
with the standard LS logic family.
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