CDCLVP2106EVM CDCLVP2106 Evaluation Module angled board image

CDCLVP2106EVM

CDCLVP2106 Evaluation Module

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Features for the CDCLVP2106EVM

  • Easy-to-use evaluation board to fan out low phase noise clocks
  • Easy device setup
  • Fast configuration
  • Control pins configurable through jumpers
  • Board powered at +2.5-V/+3.3-V
  • Single-ended or differential input clocks
  • CDCLVP2106 supports 12 LVPECL outputs; CDCLVP2106EVM supports four LVPECL outputs

Description for the CDCLVP2106EVM

The CDCLVP2106 is a high-performance, low additive phase noise clock buffer. It has two universal input buffers that support either single-ended or differential clock input. Each input feeds a bank of six LVPECL outputs. The device also features on-chip bias generators that can provide the LVPECL common-mode voltage to the device inputs. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVP2106. This fully assembled and factory-tested evaluation board allows complete validation of the CDCLVP2106device functionalities. For optimum performance, the board is equipped with 50-ohm SMA connectors and well-controlled, 50-ohmimpedance microstrip transmission lines.

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