CDCLVP2108EVM Evaluation module for CDCLVP2108, a low additive phase noise clock buffer angled board image

CDCLVP2108EVM

Evaluation module for CDCLVP2108, a low additive phase noise clock buffer

Pricing

Qty Price
+

Features for the CDCLVP2108EVM

  • Dual 1:8 LVPECL Differential Buffer
  • Universal Inputs Accept LVPECL, LVDS, or LVCMOS/LVTTL
  • Maximum Clock Frequency: 2 GHz
  • Maximum Core Current Consumption: 110mA
  • Very Low Additive Jitter: < 100 fs,rms in 10 kHz to 20 MHz Offset Range
  • 2.375 V to 3.6 V Device Power Supply
  • Maximum Propagation Delay: 550 ps
  • Maximum Output Skew: 30 ps
  • Industrial Temperature Range: -40°C to +85°C
  • ESD Protection Exceeds 2 kV (HBM)
  • Available in 7-mm X 7-mm QFN-48 (RGZ) Package

Description for the CDCLVP2108EVM

CDCLVP2108EVM is the evaluation module for CDCLVP2108. The CDCLVP2108 is a highly versatile, low additive jitter buffer that integrates two channels of 1:8 LVPECL buffers with selectable LVPECL, LVDS, or LVCMOS inputs. It has a maximum clock frequency up to 2 GHz. The overall additive jitter performance is less than 0.1 ps, RMS from 10 kHz to 20 MHz, and overall output skew is as low as 30 ps, making the device a perfect choice for use in demanding applications.

Pricing

Qty Price
+