CDCM6100xEVM is the evaluation module for CDCM61004 or CDCM61002 or CDCM61001. CDCM61004/2/1 family is a highly versatile, ultra low-jitter frequency synthesizer family that can generate four/two/one low-jitter clock output pairs, selectable among LVPECL, LVDS, or 2 LVCMOS, from a low-frequency crystal or LVCMOS input for a variety of wireline and data communication applications. The CDCM6100x features an onboard PLL that can be easily configured solely through control pins. The overall output random jitter performance is less than 1ps, RMS (from 10 kHz to 20 MHz), making this device a perfect choice for use in demanding applications such as SONET, Ethernet, Fibre Channel, and SAN. The pin-pin compatible CDCM6100x is available in a small, 32-pin, 5mmx5mm QFN package. The CDCM6100x is a programmable clock generator with control pins only. No EEPROM or programming interface is necessary to program these devices. The CDCM6100x evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCM61004 and is representative of the performance of the CDCM61001 and CDCM61002. The only difference among these 3 devices is the number of outputs. This fully-assembled and factory-tested evaluation board allows complete validation of all device functions.