See datasheet for actual packaging/pinout drawings

Packaging

Package | PIN:

GKE | 96

Temp:

I (-40 to 85)

ECO Plan:

TBD

CLVTH32374IGKEREP


Enhanced Product 3.3-V Abt 32-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs

TI Store Price:

 
 
Qty.Price
1 - 9 $ 6.30
10 - 24 $ 5.74
25 - 99 $ 5.18
100 - 249 $ 4.76
250 - 499 $ 4.34
500 - 749 $ 3.75
750 - 999 $ 3.25
1000 - 9999 $ 2.80

Adjust your quantity during checkout

Texas Instruments CLVTH32374IGKEREP

The SN74LVTH32374 is a 32-bit edge-triggered D-type flip-flop designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. This device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

This device can be used as four 8-bit flip-flops, two 16-bit flip-flops, or one 32-bit flip-flop. On the positive transition of the clock (CLK), the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

View datasheet
View product folder
Order SummaryEdit >
MSP-EXP430FR4133 (1)$13.99
Subtotal: $13.99
Shipping & Handling: -
Total (USD): $13.99