See datasheet for actual packaging/pinout drawings

Package | PIN:

DBQ | 24

Temp:

I (-40 to 85)

ECO Plan:

Green (RoHS & no Sb/Br)

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CY74FCT821ATQCT-10-Bit Bus Interface Flip-Flops with 3-State Outputs

This bus-interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT821T is a 10-bit-wide buffered version of the popular CY74FCT374 function. This device is ideal for use as an output port requiring high IOL/IOH.

This device is designed for high-capacitance load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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