The DIX4192-Q1 device is a highly-integrated CMOS device
designed for use in professional and broadcast digital audio systems. The DIX4192-Q1 combines a digital audio interface receiver (DIR) and transmitter
(DIT), two audio serial ports, and flexible distribution logic for interconnection of the function
block data and clocks.
The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201
interface standards. The audio serial ports and DIT may be operated at sampling rates up to 216
kHz. The DIR lock range includes sampling rates from 20 kHz to 216 kHz.
The DIX4192-Q1 device is configured using on-chip control
registers and data buffers, which are accessed through either a four-wire serial peripheral
interface (SPI) port, or a two-wire I2C bus interface. Status registers
provide access to a variety of flag and error bits, which are derived from the various function
blocks. An open-drain interrupt output pin is provided, and is supported by flexible interrupt
reporting and mask options through control register settings. A master reset input pin is provided
for initialization by a host processor or supervisory functions.
The DIX4192-Q1 device requires a 1.8-V core logic supply,
in addition to a 3.3-V supply for powering portions of the DIR, DIT, and line driver and receiver
functions. A separate logic I/O supply supports operation from 1.65 V to 3.6 V, providing
compatibility with low-voltage logic interfaces typically found on digital signal processors and
programmable logic devices.
The DIX4192-Q1 device is available in a lead-free, TQFP-48
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