The DS32EL0421/DS32ELX0421 is a 125 MHz to 312.5 MHz (DDR) serializer for high-speed
serial transmission over FR-4 printed circuit board backplanes, balanced cables, and optical fiber.
This easy-to-use chipset integrates advanced signal and clock conditioning functions, with an FPGA
The DS32EL0421/DS32ELX0421 serializes up to 5 parallel input LVDS channels to create a
maximum data payload of 3.125 Gbps. If the integrated DC-balance encoding is enabled, the maximum
data payload achievable is 2.5 Gbps.
The DS32EL0421/DS32ELX0421 serializers feature remote sense capability to automatically
detect and negotiate link status with its companion DS32EL0124/DS32ELX0124 deserializers without
requiring an additional feedback path.
The parallel LVDS interface reduces FPGA I/O pins, board trace count and alleviates EMI
issues, when compared to traditional single-ended wide bus interfaces.
The DS32EL0421/DS32ELX0421 is programmable through a SMBus interface as well as through
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