DS90LV110 is a 1 to 10 data/clock
distributor utilizing LVDS (Low Voltage Differential Signaling) technology for low power, high
speed operation. Data paths are fully differential from input to output for low noise generation
and low pulse width distortion. The design allows connection of 1 input to all 10 outputs. LVDS I/O
enable high speed data transmission for point-to-point interconnects. This device can be used as a
high speed differential 1 to 10 signal distribution / fanout replacing multi-drop bus applications
for higher speed links with improved signal quality. It can also be used for clock distribution up
The DS90LV110 accepts LVDS signal levels, LVPECL levels directly or PECL with attenuation
The LVDS outputs can be put into TRI-STATE by use of the enable pin.
For more details, please refer to the Application Information section of this datasheet.
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