The DS90UR90xQ-Q1 chipset translates a parallel RGB video interface into a high-speed
serialized interface over a single pair. This serial bus scheme makes system design easy by
eliminating skew problems between clock and data, reducing the number of connector pins, reducing
the interconnect size, weight, cost, and easing overall PCB layout. In addition, internal
DC-balanced decoding is used to support AC-coupled interconnects.
The DS90UR905Q-Q1 serializer embeds the clock, balances the data payload, and level
shifts the signals to high-speed, low voltage differential signaling. Up to 24 inputs are
serialized, along with the three video control signals. This supports full
24-bit color or 18-bit color and 6 general-purpose signals (for example, Audio I2S
The DS90UR906Q-Q1 deserializer recovers the data (RGB) and control signals and extracts
the clock from the serial stream. The DS90UR906Q-Q1 is able to lock to the incoming data stream
without the use of a training sequence or special SYNC patterns and does not require a reference
clock. A link status (LOCK) output signal is provided.
Serial transmission is optimized by a user-selectable de-emphasis, differential output
level select features, and receiver equalization. EMI is minimized by the use of low voltage
differential signaling, receiver drive strength control, and spread spectrum clocking
compatibility. The deserializer may be configured to generate spread spectrum clock and data on its
The DS90UR905Q-Q1 serializer is offered in a 48-pin WQFN and the DS90UR906Q-Q1
(deserializer) is offered in a 60-pin WQFN package. They are specified over the automotive AEC-Q100
grade 2 temperature range of –40°C to +105°C.
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