The DS90UR908Q converts FPD-Link II to FPD Link. It translates a high-speed serialized
interface with an embedded clock over a single pair (FPD-Link II) to four LVDS data/control streams
and one LVDS clock pair (FPD-Link). This serial bus scheme greatly eases system design by
eliminating skew problems between clock and data, reduces the number of connector pins, reduces the
interconnect size, weight, and cost, and overall eases PCB layout. In addition, internal DC
balanced decoding is used to support AC-coupled interconnects.
The DS90UR908Q converter recovers the data (RGB) and control signals and extracts the
clock from a serial stream (FPD-Link II). It is able to lock to the incoming data stream without
the use of a training sequence or special SYNC patterns and does not require a reference clock. A
link status (LOCK) output signal is provided.
Adjustable input equalization of the serial input stream provides compensation for
transmission medium losses of the cable and reduces the medium-induced deterministic jitter. EMI is
minimized by the use of low voltage differential signaling, output voltage level select feature,
and additional output spread spectrum generation.
With fewer wires to the physical interface of the display, FPD-Link output with LVDS
technology is ideal for high speed, low power and low EMI data transfer.
The DS90UR908Q is offered in a 48-pin WQFN package and is specified over the automotive
AEC-Q100 grade 2 temperature range of -40˚C to +105˚C.
View datasheet View product folder