The DS92LV0411 (serializer) and DS92LV0412 (deserializer) chipset translates a Channel
Link LVDS video interface (4 LVDS Data + LVDS Clock) into a high-speed serialized interface over a
single CML pair.
The DS92LV0411/DS92LV0412 enables applications that currently use the popular Channel
Link or Channel Link style devices to seamlessly upgrade to an embedded clock interface to reduce
interconnect cost or ease design challenges. The parallel LVDS interface also reduces FPGA I/O
pins, board trace count and alleviates EMI issues, when compared to traditional single-ended wide
Programmable transmit de-emphasis, receive equalization, on-chip scrambling and DC
balancing enables longer distance transmission over lossy cables and backplanes. The Deserializer
automatically locks to incoming data without an external reference clock or special sync patterns,
providing easy “plug-and-go” operation.
The DS92LV0411 and DS92LV0412 are programmable though an I2C interface as well as by
pins. A built-in AT-SPEED BIST feature validates link integrity and may be used for system
The DS92LV0411 and DS92LV0412 can be used interchangeably with the DS92LV2411 or
DS92LV2412. This allows designers the flexibility to connect to the host device and receiving
devices with different interface types, LVDS or LVCMOS.
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