The DS92LV16 Serializer/Deserializer (SERDES) pair transparently translates a 16–bit
parallel bus into a BLVDS serial stream with embedded clock information. This single serial stream
simplifies transferring a 16-bit, or less bus over PCB traces and cables by eliminating the skew
problems between parallel data and clock paths. It saves system cost by narrowing data paths that
in turn reduce PCB layers, cable width, and connector size and pins.
This SERDES pair includes built-in system and device test capability. The line loopback
and local loopback features provide the following functionality: the local loopback enables the
user to check the integrity of the transceiver from the local parallel-bus side and the system can
check the integrity of the data transmission line by enabling the line loopback.
The DS92LV16 incorporates BLVDS signaling on the high-speed I/O. BLVDS provides a low
power and low noise environment for reliably transferring data over a serial transmission path. The
equal and opposite currents through the differential data path control EMI by coupling the
resulting fringing fields together.
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