The LM5025D is a functional variant of the LM5025 active clamp PWM controller. The
functional differences of the LM5025D are:
- The CS1 and CS2 absolute maximum ratings have been increased to 7 V.
- The CS1 and CS2 current limit thresholds have been increased to 0.5 V.
- The internal CS2 filter discharge device has been disabled and no longer
operates each clock cycle.
- The internal VCC and
VREF regulators continue to operate when the line UVLO pin is below
The LM5025D PWM controller contains all of the features necessary to implement power
converters utilizing the Active Clamp and Reset technique. With the active clamp technique, higher
efficiencies and greater power densities can be realized compared to conventional catch winding or
RDC clamp and reset techniques. Two control outputs are provided, the main power switch control
(OUT_A) and the active clamp switch control (OUT_B). The two internal compound gate drivers
parallel both MOS and Bipolar devices, providing superior gate drive characteristics. This
controller is designed for high-speed operation including an oscillator frequency range up to 1 MHz
and total PWM and current sense propagation delays less than 100 ns. The LM5025D includes a
high-voltage start-up regulator that operates over a wide input range of 13 V to 90 V. Additional
features include: Line Under-Voltage Lockout (UVLO), softstart, oscillator UP and DOWN sync
capability, precision reference and thermal shutdown.
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