The LMH0030 SMPTE 292M/259M Digital Video Serializer with Ancillary Data FIFO and
Integrated Cable Driver is a monolithic integrated circuit that encodes, serializes and transmits
bit-parallel digital video data conforming to SMPTE 125M and 267M standard definition, 10-bit wide
component video and SMPTE 260M, 274M, 295M and 296M high-definition, 20-bit wide component video
standards. The LMH0030 operates at SMPTE 259M serial data rates of 270 Mbps, 360 Mbps, the SMPTE
344M serial data rate of 540 Mbps, and the SMPTE 292M serial data rates of 1483.5 and 1.485 Gbps.
The serial data clock frequency is internally generated and requires no external frequency setting,
trimming or filtering components.
The LMH0030 performs functions which include: parallel-to-serial data conversion, SMPTE
standard data encoding, NRZ to NRZI data format conversion, serial data clock generation and
encoding with the serial data, automatic video rate and format detection, ancillary data packet
management and insertion, and serial data output driving. The LMH0030 has circuitry for automatic
EDH/CRC character and flag generation and insertion per SMPTE RP-165 (standard definition) or SMPTE
292M (high definition). Optional LSB dithering is implemented which prevents pathological pattern
generation. Unique to the LMH0030 are its video and ancillary data FIFOs. The video FIFO allows the
video data to be delayed from 0 to 4 parallel data clock periods for video timing purposes. The
ancillary data port and on-chip FIFO and control circuitry store and insert ancillary flags, data
packets and checksums into the ancillary data space. The LMH0030 also has an exclusive built-in
self-test (BIST) and video test pattern generator (TPG) with SD and HD component video test
patterns: reference black, PLL and EQ pathologicals and color bars in 4:3 and 16:9 raster formats
for NTSC and PAL standards*. The color bar patterns feature optional bandwidth limiting coding in
the chroma and luma transitions.
The LMH0030 has a unique multi-function I/O port for immediate access to control and
configuration settings. This port may be programmed to provide external access to control functions
and indicators as inputs and outputs. The designer can thus customize the LMH0030 to fit the
desired application. At power-up or after a reset command, the LMH0030 is auto-configured to a
default operating condition. Separate power pins for the output driver, PLL and the serializer
improve power supply rejection, output jitter and noise performance.
The LMH0030's internal circuitry is powered from +2.5V and the I/O circuitry from a +3.3V
supply. Power dissipation is typically 430mW at 1.485 Gbps including two 75Ω AC-coupled and
back-matched output loads. The device is packaged in a 64-pin TQFP.
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