The LMH1983 is a highly-integrated programmable audio/video (A/V) clock generator
intended for broadcast and professional applications. It can replace multiple PLLs and VCXOs used
in applications supporting SMPTE serial digital video (SDI) and digital audio AES3/EBU standards.
It offers low-jitter reference clocks for any SDI transmitter to meet stringent output jitter
specifications without additional clock cleaning circuits.
The LMH1983 features automatic input format detection, simple programming of multiple A/V
output formats, genlock or digital free-run modes, and override programmability of various
automatic functions. The recognized input formats include HVF syncs for the major video standards,
27 MHz, 10 MHz, and 32/44.1/48/96 kHz audio word clocks.
The dual-stage PLL architecture integrates four PLLs with three on-chip VCOs. The first
stage (PLL1) uses an external low-noise 27 MHz VCXO with narrow loop bandwidth to provide a clean
reference clock for the next stage. The second stage (PLL2, 3, 4) consists of three parallel VCO
PLLs for simultaneous generation of the major digital A/V clock fundamental rates, including 148.5
MHz, 148.5/1.001 MHz, and 98.304 MHz (4 × 24.576 MHz). Each PLL can generate a clock and a timing
pulse to indicate top of frame (TOF).
When locked to reference, an internal 10-bit ADC will track the loop filter control
voltage. When a loss of reference (LOR) occurs, the LMH1983 can be programmed to hold the control
voltage to maintain output accuracy within ±0.5 ppm (typical) of the previous reference. The
LMH1983 can be configured to re-synchronize to a previous reference with glitch-less
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