LMK04832EVM LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module angled board image

LMK04832EVM

LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module

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Features for the LMK04832EVM

  • Up to three clock inputs for PLL1 operation and up to four clock inputs for PLL2 operation
  • Buffered OSCin output on OSCout port; if used, reduce one clock input
  • 14 clock outputs from internal VCO, external VCO or clock input, plus one buffered OSCin output
  • SYNC input on CLKin0 or SYNC pin for multidevice synchronization

Description for the LMK04832EVM

The LMK04832 evaluation module (EVM) allows evaluation of the LMK04832 with test equipment or other evaluation boards to verify block or system requirements for use in a specific application.

LMK04832EVM is prepopulated with a 122.88-MHz VCXO for dual-loop operation. The VCXO can be substituted if a different VCXO frequency is required or a specific VCXO is desired for performance evaluation. 

The EVM can be reconfigured for single-loop operation or clock divider/delay/fanout configuration. The LMK04832 is a versatile device and the LMK04832EVM allows evaluation of the LMK04832 in its many configurations.

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