The LP2995 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3
specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier
to provide excellent response to load transients. The output stage prevents shoot through while
delivering 1.5A continuous current and transient peaks up to 3A in the application as required for
DDR-SDRAM termination. The LP2995 also incorporates a VSENSE pin to provide
superior load regulation and a VREF output as a reference for the chipset
and DDR DIMMS.
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