The TPS65919-Q1 PMIC integrates
four configurable step-down converters with up to 3.5 A of output current
to power the processor core, memory, I/O, and preregulation of LDOs The device is AEC-Q100 qualified. The step-down converters are synchronized
to an internal 2.2-MHz clock to improve EMC performance of the device. The GPIO_3 pin allows the
step-down converters to synchronize to an external clock, allowing multiple devices to synchronize
to the same clock which improves system-level EMC performance. The device also contains
four LDOs to power low-current or low-noise domains.
The power-sequence controller uses one-time programmable (OTP) memory to control the
power sequences, as well as default configurations such as output voltage and GPIO configurations.
The OTP is factory-programmed to allow start-up without any software required. Most static settings
can be changed from the default through SPI or I2C to configure the
device to meet many different system needs. For example, voltage-scaling registers are used to
support dynamic voltage-scaling requirements of processors.
The OTP also contains a bit-integrity-error detection
feature to stop the power-up sequence if an error is detected, preventing the system from starting
in an unknown state.
The TPS65919-Q1 device also includes an analog-to-digital converter (ADC) to
monitor the system state. The GPADC includes two external channels to monitor any external voltage,
as well as internal channels to measure supply voltage, output current, and die temperature,
allowing the processor to monitor the health of the system. The device offers a watchdog to monitor
for software lockup, and includes protection and diagnostic mechanisms such as short-circuit
protection, thermal monitoring, shutdown, and automatic ADC conversions to detect if a voltage is
below a predefined threshold. The PMIC can notify the processor of these events through the
interrupt handler, allowing the processor to take action in response.
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