See datasheet for actual packaging/pinout drawings

Packaging

Package | PIN:

DGG | 48

Temp:

I (-40 to 85)

ECO Plan:

Green (RoHS & no Sb/Br)

SCANSTA111MT/NOPB


Enhanced SCAN Bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port

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Texas Instruments SCANSTA111MT/NOPB

The SCANSTA111 extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. The advantage of a multidrop approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules. Each SCANSTA111 supports up to 3 local IEEE 1149.1 scan rings which can be accessed individually or combined serially. Addressing is accomplished by loading the instruction register with a value matching that of the Slot inputs. Backplane and inter-board testing can easily be accomplished by parking the local TAP Controllers in one of the stable TAP Controller states via a Park instruction. The 32-bit TCK counter enables built in self test operations to be performed on one port while other scan chains are simultaneously tested.

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