The DPHY440 is a one to four lane and clock MIPI DPHY re-timer that regenerates the DPHY
signaling. The device complies with MIPI DPHY 1.1 standard and can be used in either a MIPI CSI-2
or MIPI DSI application at datarates of up to 1.5 Gbps.
The device compensates for PCB, connector, and cable related frequency loss and switching
related loss to provide the optimum electrical performance from a CSI2/DSI source to sink. The
DPHY440’s DPHY inputs feature configurable equalizers.
The output pins automatically compensate for uneven skew between clock and data lanes
received on its inputs ports. The DPHY440 output voltage swing and edge rate can be adjusted by
changing the state of the VSADJ_CFG0 pin and ERC pin respectively.
The DPHY440 is optimized for mobile applications, and contains activity detection
circuitry on the DPHY Link interface that can transition into a lower power mode when in ULPS and
The SN65DPHY440SS is characterized for an industrial temperature range from -40ºC to 85ºC
while SN75DPHY440SS is characterized for commercial temperature range from 0ºC to 70ºC.
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