See datasheet for actual packaging/pinout drawings

Packaging

Package | PIN:

PAP | 64

Temp:

T (-40 to 105)

ECO Plan:

Green (RoHS & no Sb/Br)

SN65DSI85TPAPRQ1


Automotive Dual Channel MIPI DSI to Dual-Link Flatlink LVDS Bridge

TI Store Price:

 
 
Qty.Price
1 - 9 $ 12.23
10 - 24 $ 11.00
25 - 99 $ 10.03
100 - 249 $ 9.05
250 - 499 $ 8.22
500 - 749 $ 7.24
750 - 999 $ 6.41
1000 - 9999 $ 5.75

Adjust your quantity during checkout

Texas Instruments SN65DSI85TPAPRQ1

The SN65DSI85-Q1 DSI-to-LVDS bridge features a dual-channel MIPI D-PHY receiver front-end configuration with four lanes per channel operating at 1 Gbps per lane and a maximum input bandwidth of 8 Gbps. The bridge decodes MIPI DSI 18-bpp RGB666 and 24-bpp RGB888 packets and converts the formatted video data-stream to an LVDS output operating at pixel clocks operating from 25 MHz to 154 MHz, offering a dual-link LVDS, single-link LVDS, or two Single-Link LVDS interfaces with four data lanes per link.

The SN65DSI85-Q1 device is well suited for WQXGA (2560 × 1600) at 60 frames per second (fps), as well as 3D Graphics at WUXGA and True HD (1920 × 1080) resolutions at an equivalent 120 fps with up to 24 bits-per-pixel (bpp). Partial line buffering is implemented to accommodate the data stream mismatch between the DSI and LVDS interfaces.

The SN65DSI85-Q1 device is implemented in a small outline 10 mm × 10 mm HTQFP package with a 0.5-mm pitch, and operates across a temperature range from –40°C to 105°C.

View datasheet
View product folder
Order SummaryEdit >
Subtotal: $0.00
Shipping & Handling: -
Total (USD): $0.00