The SN65LVDS100, SN65LVDT100, SN65LVDS101, and SN65LVDT101 are high-speed differential
receivers and drivers connected as repeaters. The receiver accepts low-voltage differential
signaling (LVDS), positive-emitter-coupled logic (PECL), or current-mode logic (CML) input signals
at rates up to 2 Gbps and repeats it as either an LVDS or PECL output signal. The signal path
through the device is differential for low radiated emissions and minimal added jitter.
The outputs of the SN65LVDS100 and SN65LVDT100 are LVDS levels as defined by
TIA/EIA-644-A. The outputs of the SN65LVDS101 and SN65LVDT101 are compatible with 3.3-V PECL
levels. Both drive differential transmission lines with nominally 100-Ω characteristic
The SN65LVDT100 and SN65LVDT101 include a 110-Ω differential line termination resistor
for less board space, fewer components, and the shortest stub length possible. They do not include
the VBB voltage reference found in the SN65LVDS100 and SN65LVDS101.
VBB provides a voltage reference of typically 1.35 V below
VCC for use in receiving single-ended input signals and is particularly
useful with single-ended 3.3-V PECL inputs. When VBB is not used, it should
be unconnected or open.
All devices are characterized for operation from –40°C to 85°C.
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