See datasheet for actual packaging/pinout drawings

Packaging

Package | PIN:

PW | 14

Temp:

I (-40 to 85)

ECO Plan:

Green (RoHS & no Sb/Br)

SN74ABT125PWR


Quadruple Bus Buffer Gates With 3-State Outputs

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Texas Instruments SN74ABT125PWR

The ’ABT125 quadruple bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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