These 20-bit transparent D-type latches feature
noninverting 3-state outputs designed specifically
for driving highly capacitive or relatively
low-impedance loads. They are particularly
suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working
The ABT162841 devices can be used as two
10-bit latches or one 20-bit latch. While the
latch-enable (1LE or 2LE) input is high, the Q
outputs of the corresponding 10-bit latch follow
the data (D) inputs. When LE is taken low, the
Q outputs are latched at the levels set up at the D
A buffered output-enable (1OE\ or 2OE\) input can be used to place the outputs of the corresponding 10-bit latch
in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state,
the outputs neither load nor drive the bus lines significantly.
The outputs, which are designed to sink up to 12 mA, include equivalent 25- series resistors to reduce
overshoot and undershoot.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
To ensure the high-impedance state during power up or power down, OE\ shall be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
OE\ does not affect the internal operation of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
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