This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVC126 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
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