See datasheet for actual packaging/pinout drawings

Packaging

Package | PIN:

DL | 56

Temp:

I (-40 to 85)

ECO Plan:

Green (RoHS & no Sb/Br)

SN74ALVCH162268DL


12-Bit To 24-Bit Registered Bus Exchanger With 3-State Outputs

TI Store Price:

 
 
Qty.Price
1 - 9 $ 2.48
10 - 24 $ 2.24
25 - 99 $ 2.00
100 - 249 $ 1.80
250 - 499 $ 1.62
500 - 749 $ 1.34
750 - 999 $ 1.11
1000 - 9999 $ 0.94

Adjust your quantity during checkout

Texas Instruments SN74ALVCH162268DL

This 12-bit to 24-bit registered bus exchanger is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH162268 is used for applications in which data must be transferred from a narrow high-speed bus to a wide, lower-frequency bus.

The device provides synchronous data exchange between the two ports. Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input when the appropriate clock-enable (CLKEN)\ inputs are low. The select (SEL)\ line is synchronous with CLK and selects 1B or 2B input data for the A outputs.

For data transfer in the A-to-B direction, a two-stage pipeline is provided in the A-to-1B path, with a single storage register in the A-to-2B path. Proper control of these inputs allows two sequential 12-bit words to be presented synchronously as a 24-bit word on the B port. Data flow is controlled by the active-low output enables (OEA\, OEB\). These control terminals are registered, so bus direction changes are synchronous with CLK.

The B outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as possible and OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Due to OE\ being routed through a register, the active state of the outputs cannot be determined prior to the arrival of the first clock pulse.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

View datasheet
View product folder
Order SummaryEdit >
Subtotal: $0.00
Shipping & Handling: -
Total (USD): $0.00