See datasheet for actual packaging/pinout drawings

Packaging

Package | PIN:

RGY | 14

Temp:

I (-40 to 85)

ECO Plan:

Green (RoHS & no Sb/Br)

SN74AUC126RGYR


Quadruple Bus Buffer Gate with 3-State Outputs

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Texas Instruments SN74AUC126RGYR

This quadruple bus buffer gate is designed for 0.8-V to 2.7-V VCC operation, but is designed specifically for 1.6-V to 1.95-V VCC operation.

The SN74AUC126 contains four independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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