The AUP family is TIs premier solution to the industry&3146;s low-power needs in
battery-powered portable applications. This family ensures a very low static and dynamic power
consumption across the entire VCC range of 0.8 V to 3.6 V, thus resulting in
an increased battery life. The AUP devices also maintain excellent signal integrity.
The SN74AUP1G79 is a single positive-edge-triggered D-type flip-flop. When data at the
data (D) input meets the setup-time requirement, the data is transferred to the Q output on the
positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not
directly related to the rise time of the clock pulse. Following the hold-time interval, data at the
D input can be changed without affecting the levels at the outputs.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
The SN74AUP1G79 device is fully specified for partial-power-down applications using
Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
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