See datasheet for actual packaging/pinout drawings

Package | PIN:

DW | 24

Temp:

C (0 to 70)

ECO Plan:

Green (RoHS & no Sb/Br)

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SN74F543DWR-Octal Registered Transceiver With 3-State Outputs

The SN74F543 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable ( or ) and output enable ( or ) inputs are provided for each register to permit independent control in either direction of data flow. The A outputs are characterized to sink 24 mA while the B outputs are characterized to sink 64 mA.

The A-to-B enable () input must be low in order to enter data from A or to output data from B. Having low and low makes the A-to-B latches transparent; a subsequent low-to-high transition of puts the A latches in the storage mode. With and both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar, but requires using the , , and inputs.

The SN74F543 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN74F543 is characterized for operation from 0°C to 70°C.

 

 

A-to-B data flow is shown; B-to-A flow control is the same except that it uses , , and .

Output level before the indicated steady-state input conditions were established.

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