These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes inverted data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.
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