These triple 3-input positive-NAND gates are \designed for 2-V to 5.5-V VCC operation.
The 'LV10A devices perform the Boolean function Y = (A B C)\ or Y = A\ + B\ + C\ in positive logic.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.
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