The SN74LVC126A device is a quadruple bus buffer gate designed for 1.65-V to 3.6-V
The SN74LVC126A device features independent line drivers with 3-state outputs. Each
output is disabled when the associated output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE must be tied to GND
through a pulldown resistor; the minimum value of the resistor is determined by the
current-sourcing capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of
this device as a translator in a mixed 3.3-V and 5-V system environment.
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