The SN74LVC1G79 device is a single
positive-edge-triggered D-type flip-flop that is designed for 1.65-V to 5.5-V
When data at the data (D) input meets the setup time requirement, the data is transferred
to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage
level and is not directly related to the rise time of the clock pulse. Following the hold-time
interval, data at the D input can be changed without affecting the level at the output.
technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using
Ioff. The Ioff circuitry disables the outputs when
the device is powered down. This inhibits current backflow into the device which prevents damage to
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