The SN74LVC1G86 device performs the Boolean function Y =
AB + AB in positive logic. This single 2-input
exclusive-OR gate is designed for 1.65-V to 5.5-V VCC operation.
If the input is low, the other input is reproduced in true form at the
output. If the input is high, the signal on the other input is reproduced inverted at the output.
This device has low power consumption with maximum tpd of 4 ns at 3.3 V and
15-pF capacitive load. The maximum output drive is ±32-mA at 4.5 V and ±24-mA at 3.3 V.
This device is fully specified for partial-power-down applications using
Ioff. The Ioff circuitry disables the outputs,
preventing damaging current back flow through the device when it is powered down.
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