This dual buffer and line driver is designed for 1.65-V to 5.5-V
The SN74LVC2G241 device is designed specifically to improve both the performance and
density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and
NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
The SN74LVC2G241 device is organized as two 1-bit line drivers with separate
output-enable (1OE, 2OE) inputs. When 1OE is low and
2OE is high, the device passes data from the A inputs to the Y outputs. When
1OE is high and 2OE is low, the outputs are in the high-impedance
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor,
and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is
determined by the current-sinking or the current-sourcing capability of the driver.
This device is fully specified for partial-power-down applications using
Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
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