See datasheet for actual packaging/pinout drawings

Packaging

Package | PIN:

DGV | 14

Temp:

I (-40 to 85)

ECO Plan:

Green (RoHS & no Sb/Br)

SN74LVTH126DGVR


3.3-V ABT Quadruple Bus Buffers With 3-State Outputs

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Texas Instruments SN74LVTH126DGVR

These bus buffers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The ’LVTH126 devices feature independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE) input is low.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

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