AFE7070EVM AFE7070 Integrated NCO, Dual 14-bit 65MSPS DAC, RF IQ Modulator and LVDS output option EVM top board image

AFE7070EVM

AFE7070 Integrated NCO, Dual 14-bit 65MSPS DAC, RF IQ Modulator and LVDS output option EVM

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Features for the AFE7070EVM

  • Comprehensive test capability for the AFE7070
  • Direct connection to TSW3100/TSW1400 pattern generator
  • Includes CDCM7005 for clock generation or jitter cleaning
  • Accommodates a wide range of clocking options
  • Software support with a full featured GUI for easy testing and prototyping
  • LDO or DC/DC power supply options
  • Description for the AFE7070EVM

    The AFE7070EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' AFE7070 transmitter, a dual 14-bit 65-MSPS digital-to-analog converter with an integrated programmable fourth-order baseband filter and analog quadrature modulator. The AFE7070 includes additional digital signal-processing features such as a numerically controlled oscillator for frequency generation/translation, and a quadrature modulator correction circuit, providing LO leakage and sideband suppression capability.

    The EVM provides a flexible environment to test the AFE7070 under a variety of clock, data input and RF output conditions. For ease of use the AFE7070EVM includes the CDCM7005 clock generator/jitter cleaner for clocking the AFE7070. The AFE7070’s RF output (pin RFOUT) is ac-coupled by a 100 pF capacitor to the SMA connector which can be connected directly to a 50-Ω spectrum analyzer or other test equipment. The AFE7070’s LVDS output is also available via SMA connector.

    The EVM can be used along with the TSW3100/TSW1400 pattern generation card for evaluating WCDMA, LTE, or other high-performance modulation schemes. The TSW3100/TSW1400 generates the test patterns which are fed to the AFE7070 through a parallel CMOS port. The CDCM7005 clock chip can be used to synchronize the TSW3100/TSW1400 board to AFE7070EVM. The AFE7070EVM can also be interfaced to CMOS output pattern generators via a 2-row header.

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