TLK2711EVM-CVAL TLK2711EVM-CVAL SerDes Evaluation Module Board angled board image

TLK2711EVM-CVAL

TLK2711EVM-CVAL SerDes Evaluation Module Board

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Features for the TLK2711EVM-CVAL

  • 1.6- to 2.5-Gbps (Gigabits Per Second)Serializer/Deserializer
  • Hot-Plug Protection
  • High-Performance 68-Pin Ceramic Quad FlatPack Package (HFG)
  • Low-Power Operation
  • Programmable Preemphasis Levels onSerial Output
  • Interfaces to Backplane, Copper Cables, orOptical Converters
  • On-Chip 8-Bit/10-Bit Encoding/Decoding,Comma DetectOn-Chip PLL Provides Clock Synthesis FromLow-Speed Reference
  • Low Power: <500 mW
  • 3-V Tolerance on Parallel Data Input Signals
  • 16-Bit Parallel TTL-Compatible Data Interface
  • Ideal for High-Speed Backplane Interconnectand Point-to-Point Data Link
  • Military Temperature Range(–55°C to 125°C Tcase)
  • Loss of Signal (LOS) Detection
  • Integrated 50-Ω Termination Resistors on RX

    Description for the TLK2711EVM-CVAL

    The Texas Instruments TLK2711 serdes evaluation module (EVM) board is used to evaluate the TLK2711 device for point-to-point data transmission applications. The board enables the designer to connect 50-W parallel buses to both transmitter and receiver connectors. The TLK2711, using high speed PLL technology, serializes, encodes (8b/10b), and transmits data along one differential pair. The receiver part of the device deserializes, decodes, and presents data on the parallel bus. The high-speed (up to 2.5 Gbps) data lines interface to four 50-W controlled-impedance Subminiature Version A (SMA) connectors. The TLK2711 EVM board can be used to evaluate device parameters while acting as a guide for high-speed board layout. The evaluation board can be used as a daughter board that is plugged into new or existing designs. Because the TLK2711 operates over a wide range of frequencies, designers need to optimize designs for the frequency of interest. Additionally, designers may wish to use buried transmission lines and provide additional noise attenuation and EMI suppression to optimize their end product. As the frequency of operation increases, the board designer must take special care to ensure that the highest signal integrity is maintained. To achieve this, the board's impedance is controlled to 50 W for both the high-speed differential serial and parallel data connections. In addition, impedance mismatches are reduced by designing the component pad size to be as close as possible to the width of the connecting transmission lines. Vias are minimized and, when necessary, placed as close as possible to the device drivers. Because the board contains both serial and parallel transmission lines, care was taken to control both impedance and trace length mismatch (board skew). Overall, the board layout is designed and optimized to support high-speed operation. Thus, understanding impedance control and transmission line effects is crucial when designing high-speed boards.

      Some of the advanced features offered by this board include:
    • Printed-circuit board (PCB) is designed for high-speed signal integrity.
    • SMA and parallel fixtures are easily connected to test equipment.
    • All input/output signals are accessible for rapid prototyping.
    • Analog and digital power planes can be supplied through separate banana jacks for isolation or can be combined using ferrite bridging networks
    • Onboard capacitors provide ac coupling of high-speed signals

    Note: This EVM contains Pb, a necessary component for QML parts

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