See datasheet for actual packaging/pinout drawings

Packaging

Package | PIN:

RHB | 32

Temp:

I (-40 to 85)

ECO Plan:

Green (RoHS & no Sb/Br)

TLV320AIC32IRHBT


Low-Power Stereo CODEC with 6 Inputs, 6 Outputs, HP/Speaker Amplifier and 3D Effects

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500 - 749 $ 5.03
750 - 999 $ 4.35
1000 - 9999 $ 3.75

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Texas Instruments TLV320AIC32IRHBT

The TLV320AIC32 is a low-power stereo-audio codec with a stereo headphone amplifier, as well as multiple inputs and outputs, programmable in single-ended or fully-differential configurations. Extensive register-based power control is included, enabling stereo 48-kHz DAC playback as low as 14 mW from a 3.3-V analog supply, making it ideal for portable, battery-powered audio and telephony applications.

The record path of the TLV320AIC32 contains integrated microphone bias, digitally-controlled stereo-microphone pre-amp, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs.

The TLV320AIC32 contains four high-power output drivers as well as two fully differential output drivers. The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended 16-Ω headphones using ac-coupling capacitors, or stereo 16-Ω headphones in a cap-less output configuration. In addition, pairs of drivers can be used to drive 8-Ω speakers in a BTL configuration at 500 mW per channel.

The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32 kHz, 44.1 kHz, and 48 kHz rates. The stereo-audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers providing up to +59.5 dB analog gain for low-level microphone inputs.

The serial control bus supports the I2C protocol, while the serial-audio data bus is programmable for I2S, left/right justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most popular cases of 12 MHz, 13 MHz, 16 MHz, 19.2 MHz, and 19.68 MHz system clocks.

The TLV320AIC32 operates from an analog supply of 2.7 V - 3.6 V, a digital core supply of 1.65 V - 1.95 V, and a digital I/O supply of 1.1 V - 3.6 V. The device is available in a 5 × 5 mm, 32-lead QFN package.

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