See datasheet for actual packaging/pinout drawings

Package | PIN:

PW | 16


M (-55 to 125)

ECO Plan:

Green (RoHS & no Sb/Br)

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TLV5614MPWREP-Enhanced Product Quad Dac, Serial In, Pgrm Settling Time, Low-Power, H/W Or S/W Pdown

The TLV5614 is a quadruple 12-bit voltage output digital-to-analog converter (DAC) with a flexible four-wire serial interface. The four-wire serial interface allows glueless interface to TMS320™ DSP family, SPI™, QSPI™, and Microwire™ serial ports. The TLV5614 is programmed with a 16-bit serial word comprised of a DAC address, individual DAC control bits, and a 12-bit DAC value. The device has provision for two supplies - one digital supply for the serial interface (via pins DVDD and DGND), and one for the DACs, reference buffers, and output buffers (via pins AVDD and AGND). Each supply is independent of the other and can be any value between 2.7 V and 5.5 V. The dual supplies allow a typical application where the DAC is controlled via a microprocessor operating on a 3-V supply (also used on pins DVDD and DGND), with the DACs operating on a 5-V supply. The digital and analog supplies can be tied together.

The resistor string output voltage is buffered by a 2× gain rail-to-rail output buffer. The buffer features a Class AB output stage to improve stability and reduce settling time. A rail-to-rail output stage and a power-down mode makes it ideal for single-voltage, battery-based applications. The settling time of the DAC is programmable to allow the designer to optimize speed versus power dissipation. The settling time is chosen by the control bits within the 16-bit serial input string. A high-impedance buffer is integrated on the REFINAB and REFINCD terminals to reduce the need for a low source-impedance drive to the terminal. REFINAB and REFINCD allow DAC A and B to have a different reference voltage than DAC C and D.

The TLV5614 is implemented with a CMOS process and is available in a 16-terminal TSSOP package. The TLV5614M is characterized for operation from -55°C to 125°C.

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