These devices are members of TI's C5000 fixed-point
Digital Signal Processor (DSP) product family and are designed for low-power
The fixed-point DSP is based on the TMS320C55x DSP generation CPU processor core. The
C55x DSP architecture achieves high performance and low power through increased parallelism and
total focus on power savings. The CPU supports an internal bus structure that is composed of one
program bus, one 32-bit data read bus and two 16-bit data read buses, two 16-bit data write buses,
and additional buses dedicated to peripheral and DMA activity. These buses provide the ability to
perform up to four 16-bit data reads and two 16-bit data writes in a single cycle. The device also
includes four DMA controllers, each with 4 channels, providing data movement for 16-independent
channel contexts without CPU intervention. Each DMA controller can perform one 32-bit data transfer
per cycle, in parallel and independent of the CPU activity.
The C55x CPU provides two multiply-accumulate (MAC) units, each capable of 17-bit x
17-bit multiplication and a 32-bit add in a single cycle. A central 40-bit arithmetic and logic
unit (ALU) is supported by an additional 16-bit ALU. Use of the ALUs is under instruction set
control, providing the ability to optimize parallel activity and power consumption. These resources
are managed in the Address Unit (AU) and Data Unit (DU) of the C55x CPU.
The C55x CPU supports a variable byte width instruction set for improved code density.
The Instruction Unit (IU) performs 32-bit program fetches from internal or external memory and
queues instructions for the Program Unit (PU). The PU decodes the instructions, directs tasks to
the AU and DU resources, and manages the fully protected pipeline. Predictive branching capability
avoids pipeline flushes on execution of conditional instructions.
The general-purpose input and output functions, along with the 10-bit
SAR ADC on the TMS320C5535, provide sufficient pins for status, interrupts, and bit I/O for LCD
displays, keyboards, and media interfaces. Serial media is supported through two secure digital
(SD) peripherals, four Inter-IC Sound (I2S Bus) modules, one serial port interface (SPI) with up to
four chip selects, one I2C multimaster and slave interface, and a
universal asynchronous receiver/transmitter (UART) interface.
Additional peripherals include: a high-speed Universal Serial Bus (USB
2.0) device mode only (not available on TMS320C5532), a real-time clock (RTC), three
general-purpose timers with one configurable as a watchdog timer, and an analog phase-locked loop
(APLL) clock generator.
In addition, the TMS320C5535 includes a tightly coupled FFT Hardware
Accelerator. The tightly coupled FFT Hardware Accelerator supports 8- to 1024-point (in power of 2)
real and complex-valued FFTs.
Furthermore, the device includes the following three
integrated LDOs to power different sections of the device.
ANA_LDO (all devices)
provides 1.3 V to the DSP PLL (VDDA_PLL), SAR, and power-management circuits
DSP_LDO (TMS320C5535 and
'C5534) provides 1.3 V or 1.05 V to the DSP core (CVDD), selectable
on-the-fly by software as long as operating frequency ranges are observed. For lowest power
operation, the programmer can shut down the internal DSP_LDO, cutting power to the DSP core
(CVDD) while an external supply provides power to the RTC
(CVDDRTC and DVDDRTC). The RTC alarm interrupt or the
WAKEUP pin can re-enable the internal DSP_LDO and re-apply power to the DSP core. When DSP_LDO
comes out of reset, it is enabled to 1.3 V for the bootloader to operate. For the 50-MHz devices,
DSP_LDO must be programmed to 1.05 V to match the core voltage, CVDD, for
proper operation after reset.
USB_LDO (TMS320C5535, 'C5534,
and 'C5533) provides 1.3 V to the USB core digital (USB_VDD1P3) and PHY
These devices are supported by the industry’s award-winning eXpressDSP, Code Composer Studio
Integrated Development Environment (IDE), DSP/BIOS, Texas
Instruments’ algorithm standard, and the industry’s largest third-party network. Code Composer
Studio IDE features code generation tools including a C Compiler and Linker, RTDX, XDS100, XDS510,
XDS560 emulation device drivers, and evaluation modules. The
devices are also supported by the C55x DSP library which features more than 50 foundational
software kernels (FIR filters, IIR filters, FFTs, and various math functions) as well as chip
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